Bank switching originated in minicomputer systems. Many modern microcontrollers and microprocessors use bank switching to manage random-access memory, non-volatile memory, input-output devices and system management registers in small embedded systems. The technique was common in 8-bit microcomputer systems. Bank-switching may also be used to work around limitations in address bus width, where some hardware constraint prevents straightforward addition of more address lines, and to work around limitations in the ISA, where the addresses generated are narrower than the address bus width. Some control-oriented microprocessors use a bank-switching technique to access internal I/O and control registers, which limits the number of register address bits that must be used in every instruction.
Often a single database spans several banks, and the need arises to move records between banks (as for sorting). If only one bank is accessible at a time, it would be necessary to move each byte twice: first into the common memory area, perform a bank switch to the destination bank, and then actually to move the byte into the destination bank. If the computer architecture has a DMA engine or a second CPU, and its bank access restrictions differ, whichever subsystem can transfer data directly between banks should be used.
In 1985, the companies Lotus and Intel introduced Expanded Memory Specification (EMS) 3.0 for use in IBM PC compatible computers running MS-DOS. Microsoft joined for versions 3.2 in 1986 and 4.0 in 1987 and the specification became known as Lotus-Intel-Microsoft EMS or LIM EMS. It is a form of bank switching technique that allows more than the 640 KB of RAM defined by the original IBM PC architecture, by letting it appear piecewise in a 64 KB "window" located in the Upper Memory Area. The 64 KB is divided into four 16 KB "pages" which can each be independently switched. Some computer games made use of this, and though EMS is obsolete, the feature is nowadays emulated by later Microsoft Windows operating systems to provide backwards compatibility with those programs.
Read sections 2.1 and 2.2 to learn about parallel computer architectures. There are different types of parallelism: there is instruction-level parallelism, where a stream of instructions is simultaneously in partial stages of execution by a single processor; there are multiple streams of instructions, which are simultaneously executed by multiple processors. A quote from the beginning of the chapter states the key ideas:
By far the most common parallel computer architecture these days is called Multiple Instruction Multiple Data (MIMD): the processors execute multiple, possibly differing instructions, each on their own data. Saying that the instructions differ does not mean that the processors actually run different programs: most of these machines operate in Single Program Multiple Data (SPMD) mode, where the programmer starts up the same executable on the parallel processors. Since the different instances of the executable can take differing paths through conditional statements, or execute differing numbers of iterations of loops, they will in general not be completely in sync as they were on SIMD machines. This lack of synchronization is called load unbalance, and it is a major source of less than perfect speedup. 2b1af7f3a8